1. Field of the Invention
This invention relates generally to a cathode emitter, and more particularly, to a semiconductor cathode emitter including a heterojunction step-doped barrier operable at a low bias as compared to that of a hot or cold cathode emitter in a typical vacuum tube device.
2. Discussion of the Related Art
As is known, a multitude of solid state electrical components can be incorporated on a single semiconductor wafer. In this configuration, the charge carriers for each of the components are transported through the semiconductor materials. For example, in a solid state bipolar transistor, the charge carriers between the emitter and collector of the transistor travel through the semiconductor material which makes up the emitter, base and collector. Because of this, circuit performance is limited by the maximum achievable charge carrier drift velocity through the semiconductor materials and the thermal dissipation generated due to the collisions of the carriers with the lattice structure of the semiconductor materials.
From cathode ray tube technology, it is known to incorporate an emitting cathode and a receiving anode in a vacuum chamber such that electrons are emitted from the cathode to the anode through the vacuum. In these devices, in order to generate the electron beam it is often necessary to heat the cathode to a relatively high temperature in order to give the electrons enough energy to overcome the vacuum potential barrier and be emitted from the cathode into the vacuum towards the anode. Consequently, a substantial amount of power is required to generate this heat. However, once the electrons are traveling through the vacuum, they are not hindered by lattice collisions. Obviously, many other factors, such as space charge effect, size requirements, heating drawbacks, power requirements, ease of integration, etc. generally make solid state devices more attractive than cathode ray tube in certain types of devices such as in microwave and millimeter-wave power generation.
One concept to overcome the performance limitations and drawbacks concerning carrier capabilities in semiconductors has been the proposal of a vacuum microelectronic cathode emitter which combines highly integrated solid state technology with high speed, high power vacuum tube technology. In a cathode emitter, the electrical charge carriers travel in a vacuum between the different semiconductor components of an electrical device, such as a transistor, incorporated on a single wafer. Theoretically then, a solid state device of this type can operate at a much higher frequency range and power level which otherwise could be attainable with a prior art solid state device. To achieve these results, however, and make a vacuum cathode emitter practical, it is desirable that the emitter be very efficient while operating at a low bias potential.
One emitter design has been proposed in the art which has attempted to satisfy the above described requirements in order to realize the advantages of a vacuum microelectronic device. This design has been referred to as a planar-doped barrier cathode emitter. In a planar-doped barrier cathode emitter, a semiconductor heterojunction emitter includes a single atomic sheet of acceptor atoms sandwiched between intrinsic layers of a semiconductor material such as AlGaAs. However, this emitter design has suffered low emitter efficiency due to few excessive hot electrons with kinetic energies above the vacuum barrier potential, thus resulting in limitations for a practical device.
What is needed then is a vacuum microelectronic emitter which is operable at a low bias potential, and which does not suffer the emitter efficiency problems of the above described prior art. It is therefore an object of the present invention to provide such a vacuum microelectronic emitter.